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 HD74LV2GT53A
2-channel Analog Multiplexer / Demultiplexer
REJ03D0144-0200Z (Previous ADE-205-697A (Z)) Rev.2.00 Oct.17.2003
Description
The HD74LV2GT53A has 2-channel analog multiplexer / demultiplexer in an 8 pin package. Applications include signal gating, chopping, modulation, or demodulation (modem), and signal multiplexing for analog to digital and digital to analog conversion systems. Low voltage and high-speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power consumption extends the battery life.
Features
* The basic gate function is lined up as Renesas uni logic series. * Supplied on emboss taping for high-speed automatic mounting. * Control input is TTL compatible input level. Supply voltage range : 3.0 to 5.5 V Operating temperature range : -40 to +85C * Control inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) * Control inputs have hysteresis voltage for the slow transition. * Ordering Information
Part Name Package Type Package Code TTP-8DBV Package Abbreviation US Taping Abbreviation (Quantity) E (3,000 pcs/reel)
HD74LV2GT53AUSE SSOP-8 pin
Rev.2.00, Oct.17.2003, page 1 of 1
HD74LV2GT53A
Outline and Article Indication
* HD74LV2GT53A
Index band Lot No.
YMW T53
SSOP-8 Marking
Y : Year code (the last digit of year) M : Month code W : Week code
Function Table
Control inputs INH H L L H : High level L : Low level X : Immaterial A X H L On channel None Y1 Y0
Rev.2.00, Oct.17.2003, page 2 of 9
HD74LV2GT53A
Pin Arrangement
COM
1
8
VCC
INH
2
O
C
I
7
Y0
GND
3
O
C
I
6
Y1
GND
4
5
A
(Top view)
Absolute Maximum Ratings
Item Supply voltage range Input voltage range Input clamp current Output clamp current Continuous output current Continuous current through VCC or GND Maximum power dissipation *3 at Ta = 25C (in still air) Storage temperature Notes:
*1 *1, 2
Symbol VCC VI VO IIK IOK IO ICC or IGND PT Tstg
Ratings -0.5 to 7.0 -0.5 to 7.0 -0.5 to VCC + 0.5 -20 50 25 50 200 -65 to 150
Unit V V V mA mA mA mA mW C
Test Conditions
Output voltage range
Output : H or L VI < 0 VO < 0 or VO > VCC VO = 0 to VCC
The absolute maximum ratings are values, which must not individually be exceeded, and furthermore no two of which may be realized at the same time. 1. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. This value is limited to 5.5 V maximum. 3. The maximum package power dissipation was calculated using a junction temperature of 150C.
Rev.2.00, Oct.17.2003, page 3 of 9
HD74LV2GT53A
Recommended Operating Conditions
Item Supply voltage range Input voltage range Input / output voltage range Symbol VCC VI VI/O Min 3.0 0 0 0 0 Operating free-air temperature Ta -40 Max 5.5 5.5 VCC 100 20 85 C Unit V V V ns / V VCC = 3.0 to 3.6 V VCC = 4.5 to 5.5 V Conditions
Input transition rise or fall rate t / v
Note: Unused or floating control inputs must be held high or low.
Electrical Characteristics
Ta = 25C Item Input voltage Symbol VCC (V) VIH VIL Hysteresis voltage VH 3.0 to 3.6 4.5 to 5.5 3.0 to 3.6 4.5 to 5.5 3.3 5.0 3.0 4.5 3.0 4.5 RON 3.0 4.5 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 50 40 90 50 10 7 -- -- -- -- -- -- 75 Ta = -40 to 85C Typ -- -- -- -- Max Unit Test Conditions -- -- 0.6 0.8 V
+ - VT - VT
Min Typ Max Min 1.5 2.0 -- -- -- -- --
V
Control input only
0.10 -- 0.15 -- -- -- -- -- -- -- 190 100 225 125 30 20
On-state switch RON resistance Peak on resistance Difference of on-state resistance between switches RON (P)
150 --
VIN = VCC or GND VC = VIH IT = 2 mA VIN = VCC to GND VC = VIH IT = 2 mA VIN = VCC to GND VINH = VIL IT = 2 mA
180 -- 100 -- 20 15 -- --
Off-state switch Is (OFF) leakage current On-state switch Is (ON) leakage current Input current Quiescent supply current Control input capacitance IIN ICC ICC CIC
5.5
--
--
0.1 --
--
1.0 A
VIN = VCC, VOUT = GND or VIN = GND, VO = VCC, VINH = VIH VIN = VCC or GND VINH = VIL VIN = 5.5 V or GND VIN = VCC or GND
5.5 0 to 5.5 5.5 5.5 --
-- -- -- -- -- -- --
-- -- -- -- 3.5 6.0 0.5
0.1 -- 0.1 -- -- -- -- -- -- -- -- -- -- --
-- -- -- -- -- -- --
1.0 A 1.0 A 10 1.5 -- -- -- A
mA VIN = 3.4 V pF pF pF
Switch terminal CIN / OUT -- capacitance Feed through capacitance CIN-OUT --
Rev.2.00, Oct.17.2003, page 4 of 9
HD74LV2GT53A
Switching Characteristics
* VCC = 3.3 0.3 V
Ta = 25C Item Propagation delay time Enable time Disable time Symbol tPLH tPHL tZH tZL tHZ tLZ Min -- -- -- -- -- -- Typ 2.0 4.0 5.0 7.0 7.0 10.0 Max 6.0 9.0 12.0 20.0 12.0 20.0
Ta = -40 to 85C
Test
FROM
TO (Output)
Min -- -- -- -- -- --
Max 10.0 12.0 15.0 25.0 15.0 25.0
Unit Conditions (Input) ns ns ns CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF INH
COM or Yn or Yn COM INH COM or Yn COM or Yn
* VCC = 5.0 0.5 V
Ta = 25C Item Propagation delay time Enable time Disable time Symbol tPLH tPHL tZH tZL tHZ tLZ Min -- -- -- -- -- -- Typ 1.5 3.0 4.0 5.0 5.0 8.0 Max 4.0 6.0 8.0 14.0 8.0 14.0
Ta = -40 to 85C
Test
FROM
TO (Output)
Min -- -- -- -- -- --
Max 7.0 8.0 10.0 18.0 10.0 18.0
Unit Conditions (Input) ns ns ns CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF INH
COM or Yn or Yn COM INH COM or Yn COM or Yn
Operating Characteristics
* CL = 50 pF
Ta = 25C Item Power dissipation capacitance Symbol CPD VCC (V) Min 5.0 -- Typ 8.0 Max -- Unit pF Test Conditions f = 10 MHz
Rev.2.00, Oct.17.2003, page 5 of 9
HD74LV2GT53A
Test Circuit
* R ON
VCC VINH =VIL VCC VIN =VCC (ON) GND VOUT R ON =
VIN-OUT 2 x 10 -3
()
+
2.0 mA
-
V
VIN-OUT
* I S (off), I S (on)
VCC VINH =VIH VCC A VIN =VCC or GND (OFF) GND VOUT =GND or VCC VIN =VCC or GND A VINH =VIL VCC (ON) GND VOUT OPEN VCC
Rev.2.00, Oct.17.2003, page 6 of 9
HD74LV2GT53A
tr tf 90% 90% Vref Vref t PLH 50% VI 10% t PHL GND VOH VOL VCC VIN (ON) GND VOUT CL= 15 or 50 pF VCC (V) INPUTS VI tr / tf Vref
* t PLH ,t PHL
VCC VINH =VIL
VIN 10% VOUT
50%
3.30.3 2.5 V 3.0 ns 50% 5.00.5 3 V 3.0 ns 1.5 V
Notes: 1. Input waveform : PRR 1 MHz, Zo = 50 . 2. The output are measured one at a time with one transition per measurement.
* t ZH ,t ZL / t HZ ,t LZ
VCC VC VINH VCC GND 10% RL = 1k VOUT CL=15 or 50 pF S2 RL = 1k waveform-A VOUT waveform-B t ZL 50% tr 90% Vref t ZH 50% t LZ VOL +0.3 V 90% Vref tf VI 10% t HZ VOH -0.3 V VOH GND VCC VOL GND
S1
VIN
Item t ZH t ZL t HZ t LZ
S1 VCC GND VCC GND
S2 GND VCC GND VCC VCC (V) INPUTS VI tr / tf Vref
3.30.3 2.5 V 3.0 ns 50% 5.00.5 3 V 3.0 ns 1.5 V
Notes: 1. Input waveform : PRR 1 MHz, Zo = 50 . 2. Waveform - A is for an output with internal conditions such that the output is low except when disabled by the output control. 3. Waveform - B is for an output with internal conditions such that the output is high except when disabled by the output control. 4. The output are measured one at a time with one transition per measurement.
Rev.2.00, Oct.17.2003, page 7 of 9
HD74LV2GT53A
* C IN/OUT , C IN-OUT
CIN-OUT
VINH = VIH
VCC
VCC (OFF) CIN/OUT GND CIN/OUT
Rev.2.00, Oct.17.2003, page 8 of 9
HD74LV2GT53A
Package Dimensions
2.0 0.2 1.5 0.2 (0.5) (0.5) (0.5)
Unit: mm
(0.4) 2.3 0.1 3.1 0.3
0 - 0.1
8 - 0.2 - 0.05
+ 0.1
(0.17)
0.7 0.1 (0.4)
Package Code JEDEC JEITA Mass (reference value)
TTP-8DBV 0.010 g
Rev.2.00, Oct.17.2003, page 9 of 9
0.13 - 0.05
+ 0.1
Sales Strategic Planning Div.
Keep safety first in your circuit designs!
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
RENESAS SALES OFFICES
Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: <1> (408) 382-7500 Fax: <1> (408) 382-7501 Renesas Technology Europe Limited. Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, United Kingdom Tel: <44> (1628) 585 100, Fax: <44> (1628) 585 900 Renesas Technology Europe GmbH Dornacher Str. 3, D-85622 Feldkirchen, Germany Tel: <49> (89) 380 70 0, Fax: <49> (89) 929 30 11 Renesas Technology Hong Kong Ltd. 7/F., North Tower, World Finance Centre, Harbour City, Canton Road, Hong Kong Tel: <852> 2265-6688, Fax: <852> 2375-6836 Renesas Technology Taiwan Co., Ltd. FL 10, #99, Fu-Hsing N. Rd., Taipei, Taiwan Tel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999 Renesas Technology (Shanghai) Co., Ltd. 26/F., Ruijin Building, No.205 Maoming Road (S), Shanghai 200020, China Tel: <86> (21) 6472-1001, Fax: <86> (21) 6415-2952 Renesas Technology Singapore Pte. Ltd. 1, Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: <65> 6213-0200, Fax: <65> 6278-8001
http://www.renesas.com
(c) 2003. Renesas Technology Corp., All rights reserved. Printed in Japan.
Colophon 1.0


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